https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61320
--- Comment #23 from Thomas Preud'homme <thomas.preudhomme at arm dot com> --- (In reply to Eric Botcazou from comment #20) > > > Maybe a better solution for sparc would be to add a switch for this pass and > > disable it by default on sparc. What do you think about that? > > There is nothing special about SPARC, it's the same for every strict > alignment architecture supported by GCC and SLOW_UNALIGNED_ACCESS is a valid > predicate. My point was two fold: 1) Even if the pass does nothing for unaligned access on target where this is slow, a bunch of code is still executed to determine that the access is unaligned (in fact most of the pass is executed before the address of the access is known). 2) For some unaligned access the rewrite might be interesting, like rewriting this: tab[1] | (tab [2] << 8) | (tab[3] << 16) | (tab[4] << 24) into this: *((uint32_t *) &tab[1]) (considering tab[0] to be 4 byte aligned) which could end up doing one 32 bit load at addresses &tab[0], one shift and one byte load at address &tab[4].
