https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61915
Ramana Radhakrishnan <ramana at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Keywords| |missed-optimization
Target| |aarch64-*
Status|UNCONFIRMED |NEW
Last reconfirmed| |2014-08-05
Assignee|unassigned at gcc dot gnu.org |ramana at gcc dot
gnu.org
Summary|[AArch64] Default use of |[AArch64] High amounts of
|the LRA results in extra |GP to FP register moves
|code size |using LRA on AArch64
Ever confirmed|0 |1
--- Comment #4 from Ramana Radhakrishnan <ramana at gcc dot gnu.org> ---
We've noticed this overeagerness hurting in a number of places including
SPEC2k(6) for Cortex-A57 and are in the process of fixing up REGISTER_MOVE_COST
and MEMORY_MOVE_COST to fix this up for those cores. That is the first source
of reducing these number of moves.
If you have more examples and more analysis from outside these benchmarks it
would be useful to help look for such cases.
