https://gcc.gnu.org/bugzilla/show_bug.cgi?id=62662
--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> --- That is perhaps where we started to have %r11 clobbered in the routine (therefore pro_and_epilogue wanted to save %r11-%r15), and all the %r11 uses later disappear because of later passes (I think cprop_hardreg/rtl_dce mainly). I'd called that perhaps missed optimization, but not where the bug is, because even if IRA/LRA is changed not to do it in this case, there is no guarantee it will not happen on some other code (I mean, the case where during pro_and_epilogue we see one or more of %r7-%r12 registers clobbered in a leaf function, but during mach pass not clobbered anymore AND in addition to that s390_emit_epilogue optimizing and loading return reg from stack slot into non-%r14 register early before load multiple restore for latency reasons (presumably)). IMHO if we consider changing the store multiple instruction in the prologue not to save %r14, either we need to make sure there are no return insns with non-%r14 returns (otherwise e.g. save just %r14-%r15 and we can then just restore %r15), or if there are any, adjust them to return to %r14 instead.
