https://gcc.gnu.org/bugzilla/show_bug.cgi?id=64760
Oleg Endo <olegendo at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|UNCONFIRMED |NEW
Last reconfirmed| |2015-02-28
Ever confirmed|0 |1
--- Comment #1 from Oleg Endo <olegendo at gcc dot gnu.org> ---
Another scenario where #imm,r0 insns could/should be avoided is code such as:
...
mov.b r0,@(1,r2)
mov.b r0,@(2,r2)
mov.b r0,@(3,r2)
mov r1,r0 <<<<
tst #1,r0 <<<<
bt/s ...
mov.b r0,@(0,r2)
Because before the #imm,r0 insn the r0 reg is used the code is forced to be
sequential. In the example however, the stores and the test can be
parallelized which would save 1 cycle:
...
mov.b r0,@(1,r2)
mov #1,r3 <<<<
mov.b r0,@(2,r2)
tst r3,r1 <<<<
mov.b r0,@(3,r2)
bt/s ...
mov.b r0,@(0,r2)
