https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65871
--- Comment #1 from James Almer <jamrial at gmail dot com> --- The same apparently happens with bextr, blsi, blsr, and most (if not all) of AMD's tbm instructions. They set the ZF flag but gcc still generates a test instruction. http://www.felixcloutier.com/x86/BEXTR.html http://www.felixcloutier.com/x86/BLSI.html http://www.felixcloutier.com/x86/BLSR.html http://support.amd.com/TechDocs/24594.pdf
