https://gcc.gnu.org/bugzilla/show_bug.cgi?id=66275
Uroš Bizjak <ubizjak at gmail dot com> changed: What |Removed |Added ---------------------------------------------------------------------------- Status|UNCONFIRMED |NEW Last reconfirmed| |2015-05-25 Component|c |rtl-optimization Target Milestone|--- |4.9.3 Ever confirmed|0 |1 --- Comment #1 from Uroš Bizjak <ubizjak at gmail dot com> --- This problem can also be seen on x86_64-linux with gcc-6.0 and gcc -O3 -funroll-loops -mabi=ms In _.ce3 dump, we have following sequence: ... 73: L73: 72: NOTE_INSN_BASIC_BLOCK 5 44: dx:DI=[si:DI+ax:DI] REG_EQUIV [si:DI+ax:DI] 45: r9:DI=zero_extend(dx:QI) 46: NOTE_INSN_DELETED 47: xmm0:V4SI=vec_merge(vec_duplicate([r9:DI*0x4+cx:DI]),const_vector,0x1) REG_DEAD r9:DI 50: NOTE_INSN_DELETED 51: NOTE_INSN_DELETED 52: dx:DI=zero_extract(dx:DI,0x8,0x8) 53: NOTE_INSN_DELETED 54: NOTE_INSN_DELETED 55: xmm1:V4SI=vec_merge(vec_duplicate([dx:DI*0x4+cx:DI+0x400]),const_vector,0x1) REG_DEAD dx:DI 56: xmm0:V2DI=xmm0:V2DI^xmm1:V2DI REG_DEAD xmm1:V2DI 57: xmm0:V2DI=xmm0:V2DI^[di:DI+ax:DI] REG_EQUIV [di:DI+ax:DI] 58: [di:DI+ax:DI]=xmm0:V2DI REG_DEAD xmm0:V2DI 183: dx:DI=[si:DI+ax:DI+0x10] REG_EQUIV [si:DI+ax:DI+0x10] ... Please note (insn 183), a consumer of SI register. In _.rnreg dump, the above sequence is transformed to: ... 73: L73: 72: NOTE_INSN_BASIC_BLOCK 5 44: dx:DI=[si:DI+r10:DI] REG_EQUIV [si:DI+ax:DI] 45: si:DI=zero_extend(dx:QI) 46: NOTE_INSN_DELETED 47: xmm8:V4SI=vec_merge(vec_duplicate([si:DI*0x4+cx:DI]),const_vector,0x1) REG_DEAD r9:DI 50: NOTE_INSN_DELETED 51: NOTE_INSN_DELETED 52: ax:DI=zero_extract(dx:DI,0x8,0x8) 53: NOTE_INSN_DELETED 54: NOTE_INSN_DELETED 55: xmm9:V4SI=vec_merge(vec_duplicate([ax:DI*0x4+cx:DI+0x400]),const_vector,0x1) REG_DEAD dx:DI 56: xmm8:V2DI=xmm8:V2DI^xmm9:V2DI REG_DEAD xmm1:V2DI 57: xmm8:V2DI=xmm8:V2DI^[di:DI+r10:DI] REG_EQUIV [di:DI+ax:DI] 58: [di:DI+r10:DI]=xmm8:V2DI REG_DEAD xmm0:V2DI 183: dx:DI=[si:DI+r10:DI+0x10] REG_EQUIV [si:DI+ax:DI+0x10] ... So, (insn 45) now indeed clobbers SI register that is needed by (insn 183). Confirmed as RTL optimization problem, specifically, a rnreg pass problem.