https://gcc.gnu.org/bugzilla/show_bug.cgi?id=69617
Bug ID: 69617 Summary: PowerPC/e6500: Atomic byte/halfword operations not properly supported Product: gcc Version: 6.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: sebastian.hu...@embedded-brains.de Target Milestone: --- The PowerPC/e6500 support lacks support for the load/store byte/halfword with decoration indexed instructions: #include <stdatomic.h> unsigned char inc_uchar(atomic_uchar *a) { return atomic_fetch_add(a, 1); } unsigned short inc_ushort(atomic_ushort *a) { return atomic_fetch_add(a, 1); } powerpc-rtems4.12-gcc -O2 -Wall -Wextra -pedantic -mcpu=e6500 -m32 -S atomic.c cat atomic.s .file "atomic.c" .machine power4 .section ".text" .align 2 .p2align 4,,15 .globl inc_uchar .type inc_uchar, @function inc_uchar: rlwinm 8,3,3,27,28 li 7,255 xori 8,8,0x18 li 6,1 sync slw 7,7,8 slw 6,6,8 rlwinm 9,3,0,0,29 .L2: lwarx 3,0,9 add 5,3,6 andc 10,3,7 and 5,5,7 or 10,10,5 stwcx. 10,0,9 bne- 0,.L2 isync srw 3,3,8 rlwinm 3,3,0,0xff blr .size inc_uchar, .-inc_uchar .align 2 .p2align 4,,15 .globl inc_ushort .type inc_ushort, @function inc_ushort: rlwinm 8,3,3,27,27 li 7,0 xori 8,8,0x10 ori 7,7,0xffff li 6,1 sync slw 7,7,8 slw 6,6,8 rlwinm 9,3,0,0,29 .L6: lwarx 3,0,9 add 5,3,6 andc 10,3,7 and 5,5,7 or 10,10,5 stwcx. 10,0,9 bne- 0,.L6 isync srw 3,3,8 rlwinm 3,3,0,0xffff blr .size inc_ushort, .-inc_ushort .ident "GCC: (GNU) 6.0.0 20160202 (experimental)