[Bug target/71342] New: [RL78] set1 / clr1 with !addr16 sometimes doesn't work

[olegendo at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=71342

            Bug ID: 71342
           Summary: [RL78] set1 / clr1 with !addr16 sometimes doesn't work
           Product: gcc
           Version: 6.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: olegendo at gcc dot gnu.org
  Target Milestone: ---
            Target: rl78-elf

While this 

void test_0 (void)
{
  volatile uint8_t* p = (volatile uint8_t*)0xFFFE8;
  volatile uint8_t* u = (volatile uint8_t*)0xFFFE4;

  p[0] = (p[0] & ~(1 << 4)) | (1 << 4);
  p[1] = (p[1] & ~(1 << 4)) | (0 << 4);
  u[0] = u[0] | (1 << 6);
}

compiles to the expected code:
        set1    !-24.4
        clr1    !-23.4
        set1    !-28.6
        ret


... adding a few more of those insns makes it bail out:

void __attribute__((used)) test_1 (void)
{
  volatile uint8_t* p = (volatile uint8_t*)0xFFFE8;
  volatile uint8_t* u = (volatile uint8_t*)0xFFFE4;

  p[0] = (p[0] & ~(1 << 4)) | (1 << 4);
  p[1] = (p[1] & ~(1 << 4)) | (0 << 4);
  u[0] = u[0] | (1 << 6);

  p[0] = (p[0] & ~(1 << 5)) | (1 << 5);
  p[1] = (p[1] & ~(1 << 5)) | (0 << 5);
  u[0] = u[0] | (1 << 7);
}


        movw    r12, #-24
        movw    ax, r12
        movw    hl, ax
        set1    [hl].4
        movw    r10, #-23
        movw    ax, r10
        movw    hl, ax
        clr1    [hl].4
        movw    r8, #-28
        movw    ax, r8
        movw    hl, ax
        set1    [hl].6
        movw    ax, r12
        movw    hl, ax
        set1    [hl].5
        movw    ax, r10
        movw    hl, ax
        clr1    [hl].5
        movw    ax, r8
        movw    hl, ax
        set1    [hl].7
        ret


So instead of 25 bytes we get 43 bytes of code ...