Richard Earnshaw <rearnsha at gcc dot> changed:

           What    |Removed                     |Added
             Status|NEW                         |RESOLVED
         Resolution|---                         |INVALID

--- Comment #5 from Richard Earnshaw <rearnsha at gcc dot> ---
This is something the kernel has to address.  If the system has processors with
differently sized cache line lengths, then the OS needs to virtualize the
relevant system registers to report an appropriate (safe) line length.  Any
other approach will likely have race conditions.

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