[Bug middle-end/80173] [5/6/7 Regression] ICE in store_bit_field_1, at expmed.c:787

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=80173

--- Comment #4 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Author: jakub
Date: Fri Mar 31 06:38:35 2017
New Revision: 246608

URL: https://gcc.gnu.org/viewcvs?rev=246608&root=gcc&view=rev
Log:
        PR middle-end/80173
        * expmed.c (store_bit_field_1): Don't attempt to create
        a word subreg out of hard registers wider than word if they
        have HARD_REGNO_NREGS of 1 for their mode.

        * gcc.target/i386/pr80173.c: New test.

Added:
    trunk/gcc/testsuite/gcc.target/i386/pr80173.c
Modified:
    trunk/gcc/ChangeLog
    trunk/gcc/expmed.c
    trunk/gcc/testsuite/ChangeLog