https://gcc.gnu.org/bugzilla/show_bug.cgi?id=19706
--- Comment #9 from Aldy Hernandez <aldyh at gcc dot gnu.org> --- Author: aldyh Date: Wed Sep 13 16:40:52 2017 New Revision: 252347 URL: https://gcc.gnu.org/viewcvs?rev=252347&root=gcc&view=rev Log: 2017-08-08 Tamar Christina <tamar.christ...@arm.com> PR middle-end/19706 * config/aarch64/aarch64.md (xorsign<mode>3): New optabs. * config/aarch64/aarch64-builtins.c (aarch64_builtin_vectorized_function): Added CASE_CFN_XORSIGN. * config/aarch64/aarch64-simd-builtins.def: Added xorsign BINOP. * config/aarch64/aarch64-simd.md: Added xorsign<mode>3. gcc/testsuite/ 2017-08-08 Tamar Christina <tamar.christ...@arm.com> * gcc.target/aarch64/xorsign.c: New. * gcc.target/aarch64/xorsign_exec.c: New. * gcc.target/aarch64/vect-xorsign_exec.c: New. Added: branches/range-gen2/gcc/testsuite/gcc.target/aarch64/vect-xorsign_exec.c branches/range-gen2/gcc/testsuite/gcc.target/aarch64/xorsign.c branches/range-gen2/gcc/testsuite/gcc.target/aarch64/xorsign_exec.c Modified: branches/range-gen2/gcc/ChangeLog branches/range-gen2/gcc/config/aarch64/aarch64-simd.md branches/range-gen2/gcc/config/aarch64/aarch64.md branches/range-gen2/gcc/testsuite/ChangeLog