Bug ID: 84748
           Summary: [8 Regression] wrong code with u128 at aarch64 at -O
                    and and above
           Product: gcc
           Version: 8.0
            Status: UNCONFIRMED
          Keywords: wrong-code
          Severity: normal
          Priority: P3
         Component: rtl-optimization
          Assignee: unassigned at gcc dot
          Reporter: zsojka at seznam dot cz
  Target Milestone: ---
              Host: x86_64-pc-linux-gnu
            Target: aarch64-unknown-linux-gnu

Created attachment 43585
reduced testcase

$ aarch64-unknown-linux-gnu-gcc -O testcase.c -static
$ ./a.out 
qemu: uncaught target signal 6 (Aborted) - core dumped

$ aarch64-unknown-linux-gnu-gcc -v
Using built-in specs.
Target: aarch64-unknown-linux-gnu
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++
--enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra
--with-cloog --with-ppl --with-isl
--with-sysroot=/usr/aarch64-unknown-linux-gnu --build=x86_64-pc-linux-gnu
--host=x86_64-pc-linux-gnu --target=aarch64-unknown-linux-gnu
--with-as=/usr/bin/aarch64-unknown-linux-gnu-as --disable-libstdcxx-pch
Thread model: posix
gcc version 8.0.1 20180307 (experimental) (GCC) 

This patch:
+++ testcase.s  2018-03-07 13:30:25.248052580 +0100
@@ -27,6 +27,7 @@
        ldr     x2, [x19, #:lo12:b]
        ldr     x1, [x20, 8]
        adds    x0, x0, x2
+       adc     x1, x4, x1
        adrp    x2, d
        ldr     w2, [x2, #:lo12:d]
        sub     w2, w2, #81920
@@ -36,7 +37,6 @@
        str     w2, [x3, #:lo12:c]
        and     x2, x2, 1
        mov     x3, 0
-       adc     x1, x4, x1
        bl      __udivti3
        str     x0, [x19, #:lo12:b]
        str     x1, [x20, 8]

fixes the -O1 assembly; the "adc" is probably scheduled later by some pass,
even though it crosses modification of the carry flag.

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