[Bug target/89213] New: Optimize V2DI shifts by a constant on power8 & above systems.

[g...@the-meissners.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89213

            Bug ID: 89213
           Summary: Optimize V2DI shifts by a constant on power8 & above
                    systems.
           Product: gcc
           Version: 9.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: g...@the-meissners.org
  Target Milestone: ---

ISA 2.07 (i.e. -mcpu=power8) and above added support for doing various
operations on V2DI (i.e. vector long long) data types, including shifts.

If you generate code to shift a V2DI type by a constant, the compiler generates
sub-optimal code:

For example:

#include <altivec.h>

typedef vector long long vi64_t;
typedef vector unsigned long long vui64_t;

vi64_t
shiftra_test64 (vi64_t a)
{
  vui64_t x = {4, 4};
  return (vi64_t) vec_vsrad (a, x);
}

Generates:

shiftra_test64:
        xxspltib 0,4
        xxlor 32,0,0
        vextsb2d 0,0
        vsrad 2,2,0
        blr

when it could generate:

shiftra_test64:
        vspltisw 0,4
        vsrad 2,2,0
        blr

This is true of all 3 shift operations (shift left, logical shift right, and
arithmetic shift right).