https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89746
--- Comment #2 from Segher Boessenkool <segher at gcc dot gnu.org> --- (This is on a PowerPC 750). The compiler makes an unaligned store for this, because it knows no better than it is just a SImode store: d_5 = (int) f_4(D); _10 = (unsigned int) d_5; MEM[(short int *)p_7(D) + 6B] = _10; and *normal* unaligned stores of SImode are just fine -- they just cause an extra access if crossing an 8B boundary. OTOH, floating point load/store cause a misalignment interrupt if unaligned.