[Bug target/89822] New: self mov on x86_64 and not optimized-out sub on ARM/ARM64 in a jump table switch

[nok.raven at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=89822

            Bug ID: 89822
           Summary: self mov on x86_64 and not optimized-out sub on
                    ARM/ARM64 in a jump table switch
           Product: gcc
           Version: 9.0
            Status: UNCONFIRMED
          Keywords: missed-optimization
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: nok.raven at gmail dot com
  Target Milestone: ---
              Host: x86_64
            Target: x86_64/ARM/ARM64

Created attachment 46020
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=46020&action=edit
A reproducer

A simple switch that will be generated as a jump table:

int f1();
int f2();
int f3();
int f4();
int f5();

int foo(int i)
{
    switch (i) {
        case 1: return f1();
        case 2: return f2();
        case 3: return f3();
        case 4: return f4();
        case 5: return f5();
    }
    __builtin_unreachable();
}

Compiles into (first two rows):

i686:
  movl 4(%esp), %eax
  jmp *.L4(,%eax,4)

x86_64:
  movl %edi, %edi
  jmp *.L4(,%rdi,8)

ARM:
  sub r0, r0, #1
  cmp r0, #16

ARM64:
  sub w0, w0, #1
  cmp w0, 16


I am not sure why on ARM there is even cmp+bls. https://godbolt.org/z/hi66cD


Possibly a useful info:
GCC  x86_64
4.1  mov %edi, %eax
4.4  mov %edi, %edi
4.6  movl %edi, %edi
4.8  bogus jump became jump to ret
8.1  jump to ret removed, but self mov is still there