https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88709
--- Comment #9 from Richard Earnshaw <rearnsha at gcc dot gnu.org> --- (In reply to Jakub Jelinek from comment #7) > (In reply to Christophe Lyon from comment #6) > > I've noticed that the new test store_merging_29.c fails on > > arm-none-eabi --with-cpu cortex-a9 > > FAIL: gcc.dg/store_merging_29.c scan-tree-dump store-merging "New sequence > > of 3 stores to replace old one of 6 stores" > > That is because target-supports.exp lies on arm, even for -mcpu=cortex-a9 > STRICT_ALIGNMENT is 1 on arm (it is 1 unconditionally), but > check_effective_target_non_strict_align returns true on arm anyway. > I've already added hacks for it in r256783 in another testcase though, guess > I'll do something similar now, but I must say I'm not very excited about > that. Support for misaligned accesses is a three(.5!)-valued problem: 1) There's no support in the architecture at all 2) There's some support with a limited set of instructions 3) There's full support: any memory access can handle any alignment. 3.5) There's full support: but some accesses may be very slow I would think that these days most CPU architectures actually fall into either 1 or 2. Many architectures have limitations, for example on atomic accesses that are unaligned. STRICT_ALIGNMENT only covers, in reality case 3. I'm not even sure if it would be defined on a machine with case 3.5. I think the real problem here is that it's not clear what question this target-supports macro is really asking - does the CPU have the capability to do (some) unaligned acceses? or can it arbitrarily support casts from unaligned pointers to standard types?
