https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88231
--- Comment #8 from Martin Sebor <msebor at gcc dot gnu.org> --- (In reply to Martin Liška from comment #7) > Can we do such an optimization without GAS information about size of every > function? My thought was that we could use alignment alone if we didn't know the sizes of instructions on targets like i386 with variable instruction lengths, as a guesstimate, to do better than chance. On RISC targets with fixed instruction length like SPARC it should be possible to get the size just by counting instructions. I don't know this part of GCC so I have no idea what's available.