https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91154
--- Comment #33 from Richard Biener <rguenth at gcc dot gnu.org> ---
(In reply to Uroš Bizjak from comment #32)
> (In reply to H.J. Lu from comment #31)
>
> > > No, IMO IRA should be "fixed" to avoid stack temporary and (based on some
> > > cost metric) use direct move for paradoxical subregs.
> >
> > The problem is
> >
> > /* Moves between SSE and integer units are expensive. */
> > if (SSE_CLASS_P (class1) != SSE_CLASS_P (class2))
> >
> > /* ??? By keeping returned value relatively high, we limit the number
> > of moves between integer and SSE registers for all targets.
> > Additionally, high value prevents problem with x86_modes_tieable_p(),
> > where integer modes in SSE registers are not tieable
> > because of missing QImode and HImode moves to, from or between
> > MMX/SSE registers. */
> > return MAX (8, SSE_CLASS_P (class1)
> > ? ix86_cost->hard_register.sse_to_integer
> > : ix86_cost->hard_register.integer_to_sse);
> >
> > The minimum cost of moves between SSE and integer units is 8.
>
> I guess this should be reviewed. This is from reload time, nowadays we never
> actually disable sse <-> int moves, we use preferred_for_{speed,size}
> attributes. Also, at least for TARGET_MMX_WITH_SSE targets, we can change
> the penalty for MMX moves.
>
> These sort of changes should be backed by runtime benchmark results.
>
> Thanks for heads up, but let's take this cost issue elsewhere.
I think it's related but since we were asked to keep this PR open also for
other targets I've created PR91498 for the 300.twolf regression and this
RA/costing issue.
