https://gcc.gnu.org/bugzilla/show_bug.cgi?id=78176
--- Comment #29 from mpf at gcc dot gnu.org --- I don't remember the detail of this issue but I believe I was convinced that it is down to the lack of setting PX appropriately in HW. UX==0, PX==1. The PX control bit forces address calculations i.e. base + imm or base + reg to be performed with 32-bit rules but allows 64 instruction usage. Since there is a processor mode that is perfectly capable of meeting the requirements of a program with 64bit data and 32bit pointers then the solution is to set PX for N32 rather than UX.
