https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92176
--- Comment #6 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
(In reply to Vladimir Makarov from comment #5)
>
> I'll investigate this problem more.
Hi, Andreas. The rtlanal code (!lra_in_progress) was added to GCC since the
first patch introducing LRA. As I wrote it was for x86/x86-64 insn
descriptions which match operands of different modes one of which is XFmode.
After that I introduced LRA_SUBREG_P for solving this problem. So I believe we
can remove the code in rtlanal. Here is the patch I'd like to commit. I
checked it on variety of targets. Is the patch ok for you? I am specially
interesting in your opinion about the test. It is hard for me get z13 machine,
so I decided to use scan-assembler-not instead of running you test.
Index: ../../gcc/gcc/ChangeLog
===================================================================
--- ../../gcc/gcc/ChangeLog (revision 278865)
+++ ../../gcc/gcc/ChangeLog (working copy)
@@ -1,3 +1,10 @@
+2019-12-04 Andreas Krebbel <kreb...@linux.ibm.com>
+ Vladimir Makarov <vmaka...@redhat.com>
+
+ PR rtl-optimization/92176
+ * lra.c (simplify_subreg_regno): Don't permit unconditional
+ changing mode for LRA too.
+
2019-11-29 Vladimir Makarov <vmaka...@redhat.com>
PR rtl-optimization/92283
Index: ../../gcc/gcc/rtlanal.c
===================================================================
--- ../../gcc/gcc/rtlanal.c (revision 278413)
+++ ../../gcc/gcc/rtlanal.c (working copy)
@@ -4009,9 +4009,7 @@ simplify_subreg_regno (unsigned int xreg
/* Give the backend a chance to disallow the mode change. */
if (GET_MODE_CLASS (xmode) != MODE_COMPLEX_INT
&& GET_MODE_CLASS (xmode) != MODE_COMPLEX_FLOAT
- && !REG_CAN_CHANGE_MODE_P (xregno, xmode, ymode)
- /* We can use mode change in LRA for some transformations. */
- && ! lra_in_progress)
+ && !REG_CAN_CHANGE_MODE_P (xregno, xmode, ymode))
return -1;
/* We shouldn't simplify stack-related registers. */
Index: ../../gcc/gcc/testsuite/ChangeLog
===================================================================
--- ../../gcc/gcc/testsuite/ChangeLog (revision 278770)
+++ ../../gcc/gcc/testsuite/ChangeLog (working copy)
@@ -1,3 +1,9 @@
+2019-12-04 Andreas Krebbel <kreb...@linux.ibm.com>
+ Vladimir Makarov <vmaka...@redhat.com>
+
+ PR rtl-optimization/92176
+ * gcc.target/s390/pr92176.c: New test.
+
2019-11-27 Vladimir Makarov <vmaka...@redhat.com>
PR rtl-optimization/90007
Index: ../../gcc/gcc/testsuite/gcc.target/s390/pr92176.c
===================================================================
--- ../../gcc/gcc/testsuite/gcc.target/s390/pr92176.c (nonexistent)
+++ ../../gcc/gcc/testsuite/gcc.target/s390/pr92176.c (working copy)
@@ -0,0 +1,33 @@
+/* { dg-do compile } */
+/* { dg-options "-O3 -march=z13" } */
+
+int a = 5, b, c, d, g, h, k, l, m, o;
+static int e[7];
+int *volatile i = &d;
+long j;
+
+short p(int f, int dummy) {
+ k = 0 != (*e = m);
+ j = 0;
+ for (; j < 59; j = j + 1)
+ *i |= b;
+ g = 1;
+ for (; g <= 4; g++) {
+ o = 0;
+ for (; o <= 4; o++)
+ i = (int * volatile)(long)l;
+ }
+ return 42;
+}
+
+void
+q() {
+ char *n = (char*)&b;
+
+ (*n = a) == p(e[6], c);
+ for (; h;)
+ for (;;)
+ ;
+}
+
+/* { dg-final { scan-assembler-not "\tvsteb" } } */
