https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93123
Jakub Jelinek <jakub at gcc dot gnu.org> changed:
What |Removed |Added
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CC| |jakub at gcc dot gnu.org,
| |segher at gcc dot gnu.org
--- Comment #2 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
Similarly on x86_64:
movq %rdi, %rax
movq %rsi, %rdx
andq $-16, %rax
The problem on the rs6000 side is that it has andti3 instruction that is split
quite late (post reload in split2) and that instruction enforces the immediate
into register, even if e.g. both halves of it are suitable constants for having
the immediate in it. E.g. the define_insn could be allowed some selected
immediates in one of the operands and told RA that either it needs to be forced
into a v register if the other registers are v too, or it can stay as immediate
otherwise and then be split + handle the splitting e.g. with the & -1 special
cases.
