[Bug target/93346] gcc does not generate BZHI

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93346

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |missed-optimization
             Target|x86_64                      |x86_64-*-*, i?86-*-*
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2020-01-21
     Ever confirmed|0                           |1

--- Comment #2 from Richard Biener <rguenth at gcc dot gnu.org> ---
The bzhi patterns all match some odd if_then_else only to guard against
inx & 255 == 0:



(define_insn "*bmi2_bzhi_<mode>3"
  [(set (match_operand:SWI48 0 "register_operand" "=r")
        (if_then_else:SWI48
          (ne:QI (and:SWI48 (match_operand:SWI48 2 "register_operand" "r")
                            (const_int 255))
                 (const_int 0))
          (zero_extract:SWI48
            (match_operand:SWI48 1 "nonimmediate_operand" "rm")
            (umin:SWI48 (and:SWI48 (match_dup 2) (const_int 255))
                        (match_operand:SWI48 3 "const_int_operand" "n"))
            (const_int 0))
          (const_int 0)))
   (clobber (reg:CC FLAGS_REG))]
  "TARGET_BMI2 && INTVAL (operands[3]) == <MODE_SIZE> * BITS_PER_UNIT"
  "bzhi\t{%2, %1, %0|%0, %1, %2}"
  [(set_attr "type" "bitmanip")
   (set_attr "prefix" "vex")
   (set_attr "mode" "<MODE>")])

(define_insn "*bmi2_bzhi_<mode>3_1"
  [(set (match_operand:SWI48 0 "register_operand" "=r")
        (if_then_else:SWI48
          (ne:QI (match_operand:QI 2 "register_operand" "r") (const_int 0))
          (zero_extract:SWI48
            (match_operand:SWI48 1 "nonimmediate_operand" "rm")
            (umin:SWI48 (zero_extend:SWI48 (match_dup 2))
                        (match_operand:SWI48 3 "const_int_operand" "n"))
            (const_int 0))
          (const_int 0)))
   (clobber (reg:CC FLAGS_REG))]
  "TARGET_BMI2 && INTVAL (operands[3]) == <MODE_SIZE> * BITS_PER_UNIT"
  "bzhi\t{%<k>2, %1, %0|%0, %1, %<k>2}"


but the RTL generated for your case is

Failed to match this instruction:
(parallel [
        (set (reg:SI 88)
            (and:SI (plus:SI (ashift:SI (reg:SI 90)
                        (subreg:QI (reg:SI 93) 0))
                    (const_int -1 [0xffffffffffffffff]))
                (reg:SI 92)))
        (clobber (reg:CC 17 flags))
    ])