https://gcc.gnu.org/bugzilla/show_bug.cgi?id=95409

            Bug ID: 95409
           Summary: Failure to xor register before usage of 8-bit part in
                    some bitshifting situations
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: gabravier at gmail dot com
  Target Milestone: ---

bool f1(int x)
{
    return ((unsigned)x < 15) & ((x & 1) == 0);
}

bool f2(int x)
{
    return ~x & ((unsigned)x < 15);
}

These are equivalent (according to LLVM), but GCC outputs :

f1(int):
  cmp edi, 14
  setbe al
  andn eax, edi, eax
  ret
f2(int):
  xor eax, eax
  cmp edi, 14
  setbe al
  andn eax, edi, eax
  ret

I believe that the code generation for `f1` is suboptimal.

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