https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99927
--- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> --- Trying 105, 107 -> 108: 105: r135:QI=0x1 107: flags:CCZ=cmp(r107:SI,0) 108: r96:QI={(flags:CCZ==0)?r107:SI#0:r135:QI} REG_DEAD r107:SI REG_DEAD flags:CC Failed to match this instruction: (parallel [ (set (reg:QI 96 [ var_lsm_flag.12 ]) (subreg:QI (reg:SI 107) 0)) (set (reg:QI 135) (const_int 1 [0x1])) ]) Failed to match this instruction: (parallel [ (set (reg:QI 96 [ var_lsm_flag.12 ]) (subreg:QI (reg:SI 107) 0)) (set (reg:QI 135) (const_int 1 [0x1])) ]) Successfully matched this instruction: (set (reg:QI 135) (const_int 1 [0x1])) Successfully matched this instruction: (set (reg:QI 96 [ var_lsm_flag.12 ]) (subreg:QI (reg:SI 107) 0)) allowing combination of insns 105, 107 and 108 original costs 4 + 4 + 8 = 16 replacement costs 4 + 4 = 8 deferring deletion of insn with uid = 105. modifying insn i2 107: r135:QI=0x1 deferring rescan insn with uid = 107. modifying insn i3 108: r96:QI=r107:SI#0 REG_DEAD r107:SI deferring rescan insn with uid = 108. note that insn 107 was the CC setter for the if-then-else but we now have a plain move there.