https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100328

--- Comment #9 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Kewen Lin <li...@gcc.gnu.org>:

https://gcc.gnu.org/g:8ffe25eefae57fb3a228a2d31a57af5bdab8911f

commit r12-2045-g8ffe25eefae57fb3a228a2d31a57af5bdab8911f
Author: Kewen Lin <li...@linux.ibm.com>
Date:   Mon Jul 5 20:53:19 2021 -0500

    ira: Support more matching constraint forms with param [PR100328]

    This patch is to make IRA consider matching constraint heavily,
    even if there is at least one other alternative with non-NO_REG
    register class constraint, it will continue and check matching
    constraint in all available alternatives and respect the
    matching constraint with preferred register class.

    One typical case is destructive FMA style instruction on rs6000.
    Without this patch, for the mentioned FMA instruction, IRA won't
    respect the matching constraint on VSX_REG since there are some
    alternative with FLOAT_REG which doesn't have matching constraint.
    It can cause extra register copies since later reload has to make
    code to respect the constraint.  This patch make IRA respect this
    matching constraint on VSX_REG which is the preferred regclass,
    but it excludes some cases where for one preferred register class
    there can be two or more alternatives, one of them has the
    matching constraint, while another doesn't have.  It also
    considers the possibility of free register copy.

    With option Ofast unroll, this patch can help to improve SPEC2017
    bmk 508.namd_r +2.42% and 519.lbm_r +2.43% on Power8 while
    508.namd_r +3.02% and 519.lbm_r +3.85% on Power9 without any
    remarkable degradations.  It also improved something on SVE as
    testcase changes showed and Richard's confirmation.

    Bootstrapped & regtested on powerpc64le-linux-gnu P9,
    x86_64-redhat-linux and aarch64-linux-gnu.

    gcc/ChangeLog:

            PR rtl-optimization/100328
            * doc/invoke.texi (ira-consider-dup-in-all-alts): Document new
            parameter.
            * ira.c (ira_get_dup_out_num): Adjust as parameter
            param_ira_consider_dup_in_all_alts.
            * params.opt (ira-consider-dup-in-all-alts): New.
            * ira-conflicts.c (process_regs_for_copy): Add one parameter
            single_input_op_has_cstr_p.
            (get_freq_for_shuffle_copy): New function.
            (add_insn_allocno_copies): Adjust as single_input_op_has_cstr_p.
            * ira-int.h (ira_get_dup_out_num): Add one bool parameter.

    gcc/testsuite/ChangeLog:

            PR rtl-optimization/100328
            * gcc.target/aarch64/sve/acle/asm/div_f16.c: Remove one xfail.
            * gcc.target/aarch64/sve/acle/asm/div_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/div_f64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/divr_f16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/divr_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/divr_f64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mad_f16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mad_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mad_f64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mla_f16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mla_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mla_f64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mls_f16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mls_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mls_f64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/msb_f16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/msb_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/msb_f64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mulx_f16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mulx_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mulx_f64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/nmad_f16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/nmad_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/nmad_f64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/nmla_f16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/nmla_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/nmla_f64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/nmls_f16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/nmls_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/nmls_f64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/nmsb_f16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/nmsb_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/nmsb_f64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/sub_f16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/sub_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/sub_f64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/subr_f16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/subr_f32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/subr_f64.c: Likewise.

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