https://gcc.gnu.org/bugzilla/show_bug.cgi?id=103926
Andrew Pinski <pinskia at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Keywords|ice-on-valid-code |ice-on-invalid-code
--- Comment #2 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
The constraint is not documented even because it looks like an internal only
one:
;; Lq/stq validates the address for load/store quad
(define_memory_constraint "wQ"
"@internal Memory operand suitable for the load/store quad instructions."
(match_operand 0 "quad_memory_operand"))
Note your inline-asm is broken but GCC should not be crashing.
I think the following will work:
__int128 f(void *ptr)
{
__int128 v;
asm volatile("lq %0, 0(%1)" : "=&r" (v) : "wQ" (*(__int128 *)ptr));
return v;
}
But there still some other stuff that you need to do.
The constraint is failing because you don't have a memory passed to the
inline-asm only the register and it is the wrong size, it is a 64bit rather
than 128bit.
