https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104112
--- Comment #9 from rsandifo at gcc dot gnu.org <rsandifo at gcc dot gnu.org> --- Thanks for the patch. I'm currently testing it on SVE. (In reply to Richard Biener from comment #8) > Without -msve-vector-bits=512 we simply get variable length vector code. > There doesn't seem to be -msve-vector-bits=512,256 or so to enable > both lengths (the compiler could set a static mask to "emulate" 256 > with fixed 512 vectors?) For SVE there's nothing really special about half a vector, so there should be no reason to need successive halving (e.g. 512-bit main loop, 256-bit epilogue, 128-bit epilogue, once we support multiple epilogues). If predicating for 256 bits works then predicating for however many scalar bits are left should work too. The same goes for reductions. I haven't had chance to look at the testcase yet, but it sounds like it's one of those cases (such as reversed accesses) where we still don't support predicating the loop. If so, I think the optimisation focus would be on removing that restriction instead.
