[Bug target/105162] [AArch64] outline-atomics drops dmb ish barrier on __sync builtins

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105162

--- Comment #13 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-12 branch has been updated by Sebastian Pop
<s...@gcc.gnu.org>:

https://gcc.gnu.org/g:5251647c84489af05baa38e4dd103cf359f77b75

commit r12-8389-g5251647c84489af05baa38e4dd103cf359f77b75
Author: Sebastian Pop <s...@amazon.com>
Date:   Mon Apr 18 15:13:20 2022 +0000

    [AArch64] add barriers to ool __sync builtins

    2022-05-13  Sebastian Pop  <s...@amazon.com>

    gcc/
            PR target/105162
            * config/aarch64/aarch64-protos.h (atomic_ool_names): Increase
dimension
            of str array.
            * config/aarch64/aarch64.cc (aarch64_atomic_ool_func): Call
            memmodel_from_int and handle MEMMODEL_SYNC_*.
            (DEF0): Add __aarch64_*_sync functions.

    gcc/testsuite/
            PR target/105162
            * gcc.target/aarch64/sync-comp-swap-ool.c: New.
            * gcc.target/aarch64/sync-op-acquire-ool.c: New.
            * gcc.target/aarch64/sync-op-full-ool.c: New.
            * gcc.target/aarch64/target_attr_20.c: Update check.
            * gcc.target/aarch64/target_attr_21.c: Same.

    libgcc/
            PR target/105162
            * config/aarch64/lse.S: Define BARRIER and handle memory MODEL 5.
            * config/aarch64/t-lse: Add a 5th memory model for _sync functions.