[Bug target/106585] RISC-V: Mis-optimized code gen for zbs

[pinskia at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106585

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
Interesting rv32i_zbb produces:
foo:
        bclr    a0,a0,a1
        ret