https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106635
--- Comment #10 from Xiaoguang <xgchenshy at 126 dot com> --- (In reply to Xiaoguang from comment #9) > (In reply to Andrew Pinski from comment #8) > > In ARM Armv8, for A-profile architecture (ARM DDI 0487G.b (ID072021)): > > > > From section B2.5.2 Alignment of data accesses: > > > > An unaligned access to any type of Device memory causes an Alignment fault. > > > > Unaligned accesses to Normal memory > > Yeah, I also find such description, my memory type is uncachable normal > memory, but not device memory > I use mmap to get the virtual address with an O_SYNC in fd Also I didn't see whether normal memory cacheable or not impacts alignment access , besides, STUR instruction has unscaled imm offset, it should support unaligned access on normal memory, no matter cached or not,and my X0 is normal memory so I'm still confusing why it fails, please correct my if my understanding is wrong. thanks very much
