https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107462
Bug ID: 107462
Summary: Missed optimization of std::atomic::fetch_xxx "null
operations" to std::atomic::load()
Product: gcc
Version: 12.2.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c++
Assignee: unassigned at gcc dot gnu.org
Reporter: marko.makela at mariadb dot com
Target Milestone: ---
In g++-12 -c -O2 targeting x86-64, the fetch_xxx() variants are translated to
LOCK XADD or loops around LOCK CMPXCHG, instead of the simple MOV. I did not
test other targets.
#include <atomic>
uint32_t load(const std::atomic<uint32_t> &a)
{ return a.load(std::memory_order_relaxed); }
uint32_t load_add(std::atomic<uint32_t> &a)
{ return a.fetch_add(0, std::memory_order_relaxed); }
uint32_t load_sub(std::atomic<uint32_t> &a)
{ return a.fetch_sub(0, std::memory_order_relaxed); }
uint32_t load_or(std::atomic<uint32_t> &a)
{ return a.fetch_or(0, std::memory_order_relaxed); }
uint32_t load_xor(std::atomic<uint32_t> &a)
{ return a.fetch_xor(0, std::memory_order_relaxed); }
uint32_t load_and(std::atomic<uint32_t> &a)
{ return a.fetch_and(~uint32_t(0), std::memory_order_relaxed); }
clang++-15 would translate each function to the same x86-64 code:
0: 8b 07 mov (%rdi),%eax
2: c3 ret
When using the default std::memory_order_seq_cst, an MFENCE instruction would
be emitted before the MOV except in load().
