[Bug target/106602] riscv: suboptimal codegen for zero_extendsidi2_shifted w/o bitmanip

[vineetg at rivosinc dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106602

Vineet Gupta <vineetg at rivosinc dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |jeffreyalaw at gmail dot com,
                   |                            |vineetg at rivosinc dot com
            Summary|riscv: suboptimal codegen   |riscv: suboptimal codegen
                   |for shift left, right, left |for
                   |                            |zero_extendsidi2_shifted
                   |                            |w/o bitmanip

--- Comment #3 from Vineet Gupta <vineetg at rivosinc dot com> ---
Interestingly, if one builds for -march=rv64gc_zbs  # single bit extension

then the optimal code seq for bitmanip is generated, while no zbs instructions
are used.

foo2:
        slli    a5,a0,32
        srli    a0,a5,26
        ret