https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107723
--- Comment #3 from Kevin Lee <kevinl at rivosinc dot com> --- aarch64 also produces ceil1: fcvtps x0, d0 ret Since it has been changed to middle-end, I'll delete riscv as the target
kevinl at rivosinc dot com via Gcc-bugs Wed, 16 Nov 2022 12:45:51 -0800
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107723
--- Comment #3 from Kevin Lee <kevinl at rivosinc dot com> --- aarch64 also produces ceil1: fcvtps x0, d0 ret Since it has been changed to middle-end, I'll delete riscv as the target