https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100000
Stam Markianos-Wright <stammark at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |stammark at gcc dot gnu.org
Status|NEW |ASSIGNED
--- Comment #4 from Stam Markianos-Wright <stammark at gcc dot gnu.org> ---
I tried out Richard's suggestion in arm_vector_mode_supported_p (allowing V8HF,
V4SF and V2DF unconditionally) and it seems to have worked! After a testsuite
run I found a few ICEs due to a number of patterns that needed enabling:
@mve_vpselq_<supf><mode> which was only enabled for mve.fp
And then all the patterns that were conditional on:
- "((TARGET_HAVE_MVE && VALID_MVE_SI_MODE (<MODE>mode))
- || (TARGET_HAVE_MVE_FLOAT && VALID_MVE_SF_MODE (<MODE>mode)))
mve_vec_extract<mode><V_elem_l>
*mve_vec_extract_sext_internal<mode>
*mve_vec_extract_zext_internal<mode>
mve_vec_set<mode>_internal
*movmisalign<mode>_mve_store
*movmisalign<mode>_mve_load
These weren't causing any ICEs but also made sense to enable:
mve_vst2q<mode>
mve_vld2q<mode>
mve_vld4q<mode>
No regressions after that, but I think I will hold off until GCC14 Stage 1 to
post this patch, just to be safe.
