https://gcc.gnu.org/bugzilla/show_bug.cgi?id=109690
Richard Biener <rguenth at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Ever confirmed|0 |1
Last reconfirmed| |2023-05-02
Status|UNCONFIRMED |NEW
CC| |uros at gcc dot gnu.org
--- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> ---
The x86 target chooses not to go the "compare costs" route but choose the first
(usually biggest size) vectorization that is profitable.
So the interesting thing is that with -march=znver3 we have the
integer multiplication in V2SImode unsupported. Note that SLP chooses
V2SImode for the base V4SImode.
With V8QImode (aka V2SImode) base mode pattern recog works to produce
the desired shift.
I think the disconnect is that with V4SImode we have an integer multiplication
pattern (so no pattern is created) but with V2SImode we have not (looks like
the target chose not to implement that).
A solution would be to perform pattern recog in the vectorizable_* routines
or at least in the cases where straight-forward, simply code-gen a supported
variant.
Thus, mulv2si3 is missing.
