[Bug target/110748] New: optimize store of DF 0.0

[vineetg at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110748

            Bug ID: 110748
           Summary: optimize store of DF 0.0
           Product: gcc
           Version: 13.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: vineetg at gcc dot gnu.org
  Target Milestone: ---
            Target: RISC-V

Currently a store of int 0 is optimized by using reg x0.

void zi(int *i) {    *i = 0;    }

-O2 =march=rv64gc

  sw  zero,0(a0)
  ret

However a store of positive DF 0.0 generates 2 insns.

void zd(double *d) { *d = 0.0;  }

  fmv.d.x fa5,zero
  fsd     fa5,0(a0)
  ret

Since +0.0 is all zero bits, this could be generated as an int store
   sw zero, 0(a0) 

This is 1 less insn and avoids the FPU thus overall a win.

This came up when discussing an ICE in anewly proposed pass f-m-o by Manolis.
Turns out that it could be an independent optimization opportunity [1].

[1] https://gcc.gnu.org/pipermail/gcc-patches/2023-July/624935.html