https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111546

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <pa...@gcc.gnu.org>:

https://gcc.gnu.org/g:deb844c67f1e2b116518f9742a6acbe6f19ea28f

commit r14-4243-gdeb844c67f1e2b116518f9742a6acbe6f19ea28f
Author: Pan Li <pan2...@intel.com>
Date:   Sun Sep 24 11:36:11 2023 +0800

    RISC-V: Fix fortran ICE/PR111546 when RV32 vec_init

    When broadcast the reperated element, we take the mask_int_mode
    by mistake. This patch would like to fix it by leveraging the machine
    mode of the element.

    The below test case in RV32 will be fixed.

    * gcc/testsuite/gfortran.dg/overload_5.f90

            PR target/111546

    gcc/ChangeLog:

            * config/riscv/riscv-v.cc
            (expand_vector_init_merge_repeating_sequence): Bugfix

    Signed-off-by: Pan Li <pan2...@intel.com>

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