https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111720
--- Comment #15 from JuzheZhong <juzhe.zhong at rivai dot ai> --- After investigation: I found it seems to be an issue to variable-length vector: https://godbolt.org/z/6Wrjz9ofE void fn (char * restrict out, int x) { <bb 2> [local count: 1073741824]: MEM[(int8x16_t *)out_2(D)] = { 1, 2, 7, 1, 3, 4, 5, 3, 1, 0, 1, 2, 4, 4, 9, 9 }; return; } void fn2 (char * restrict out, int x) { svint8_t varr; char arr[32]; <bb 2> [local count: 1073741824]: arr = "\x01\x02\x07\x01\x03\x04\x05\x03\x01\x00\x01\x02\x04\x04\t\t\x01\x02\x07\x01\x03\x04\x05\x03\x01\x00\x01\x02\x04\x04\t\t"; varr_3 = MEM[(svint8_t *)&arr]; MEM[(svint8_t *)out_4(D)] = varr_3; arr ={v} {CLOBBER(eol)}; return; } If we use ARM NEON type, the gimple IR won't have CLOBBER. Then no stack transferring. fn: adrp x1, .LC0 ldr q31, [x1, #:lo12:.LC0] str q31, [x0] ret fn2: adrp x1, .LANCHOR0 add x1, x1, :lo12:.LANCHOR0 sub sp, sp, #32 ptrue p7.b, all ldp q31, q30, [x1] stp q31, q30, [sp] ld1b z31.b, p7/z, [sp] st1b z31.b, p7, [x0] add sp, sp, 32 ret ARM SVE type will have CLOBBER in gimple IR then cause redundant stack transferring in ASM.
