https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112681
--- Comment #5 from Jakub Jelinek <jakub at gcc dot gnu.org> --- Or maybe better --- gcc/config/i386/i386-expand.cc.jj 2023-11-21 09:31:35.792395304 +0100 +++ gcc/config/i386/i386-expand.cc 2023-11-23 20:57:57.128721762 +0100 @@ -2453,7 +2453,8 @@ ix86_expand_branch (enum rtx_code code, /* Generate XOR since we can't check that one operand is zero vector. */ tmp = gen_reg_rtx (mode); - emit_insn (gen_rtx_SET (tmp, gen_rtx_XOR (mode, op0, op1))); + rtx ops[3] = { tmp, op0, op1 }; + ix86_expand_vector_logical_operator (XOR, mode, ops); tmp = gen_lowpart (p_mode, tmp); emit_insn (gen_rtx_SET (gen_rtx_REG (CCZmode, FLAGS_REG), gen_rtx_UNSPEC (CCZmode,