https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112758
--- Comment #10 from Segher Boessenkool <segher at gcc dot gnu.org> --- (In reply to Jakub Jelinek from comment #6) > I must say I have no idea what WORD_REGISTER_OPERATION says about the upper > bits of a paradoxical SUBREG if it is a MEM and load_extend_op (inner_mode) > is ZERO_EXTEND (zeros then? Then this optimization is ok), or something > else? And what it says on REGs. It says those upper bits are well-defined, i.e. whatever MD pattern is used for it eventually will emit machine code that has the exact same result for those upper bits. This is almost impossible to prove for any non-trivial target, and certainly extremely fragile.
