https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112971

--- Comment #17 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
Ok. Thanks for confirm it.

Hi, Andrew.

Is this following:

```
/* x & 0 -> 0  */
(simplify
 (bit_and @0 integer_zerop@1)
 @1)
```
to
```
/* x & 0 -> 0  */
(simplify
 (bit_and:c @0 integer_zerop@1)
 @1)
```

enough ? If it can fix our RISC-V ICE.

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