[Bug target/114027] New: [14] RISC-V vector: miscompile at -O3

[patrick at rivosinc dot com via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114027

            Bug ID: 114027
           Summary: [14] RISC-V vector: miscompile at -O3
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: patrick at rivosinc dot com
  Target Milestone: ---

Testcase:
long a;
int b[10][7] = {{},
                {},
                {},
                {},
                {},
                {},
                {0, 0, 0, 0, 0, 1},
                {1, 1, 1, 1, 1, 1},
                {1, 1, 1, 1, 1, 1}};
int c;
int main() {
  int d;
  c = 0xFFFFFFFF;
  for (; a < 6; a++) {
    d = 0;
    for (; d < 6; d++) {
      c ^= -3L;
      if (b[a + 3][d])
        continue;
      c = 0;
    }
  }

  if (c == -3) {
    return 0;
  } else {
    return 1;
  }
}


Commands:
> /scratch/tc-testing/tc-feb-20/build-rv64gcv/bin/riscv64-unknown-linux-gnu-gcc 
> -march=rv64gcv -O3 red.c -o red.out
> /scratch/tc-testing/tc-feb-20-llvm/build/bin/qemu-riscv64 red.out
> echo $?
1
> /scratch/tc-testing/tc-feb-20/build-rv64gcv/bin/riscv64-unknown-linux-gnu-gcc 
> red.c -o red.out
> /scratch/tc-testing/tc-feb-20-llvm/build/bin/qemu-riscv64 red.out
> echo $?
0

Discovered/tested using g61ab046a327 (not bisected)
Found using fuzzer