https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114544
Bug ID: 114544 Summary: [x86] stv should transform (subreg DI (V1TI) 8) as (vec_select:DI (V2DI) (const_int 1)) Product: gcc Version: 14.0 Status: UNCONFIRMED Severity: normal Priority: P3 Component: target Assignee: unassigned at gcc dot gnu.org Reporter: liuhongt at gcc dot gnu.org Target Milestone: --- typedef __uint128_t v128_t __attribute__((vector_size(16))); v128_t c; v128_t foo1 (v128_t *a, v128_t *b) { c = (*a >> 1 & *b) / (__extension__(v128_t){(__int128_t)0x3 << 120 | (__int128_t)0x3 << 112 | (__int128_t)0x3 << 104 | (__int128_t)0x3 << 96 | (__int128_t)0x3 << 88 | (__int128_t)0x3 << 80 | (__int128_t)0x3 << 72 | (__int128_t)0x3 << 64 | (__int128_t)0x3 << 56 | (__int128_t)0x3 << 48 | (__int128_t)0x3 << 40 | (__int128_t)0x3 << 32 | (__int128_t)0x3 << 24 | (__int128_t)0x3 << 16 | (__int128_t)0x3 << 8 | (__int128_t)0x3 << 0}); } stv generates (insn 32 11 35 2 (set (reg:DI 124 [ _4 ]) (subreg:DI (reg:V1TI 111 [ _4 ]) 0)) "/app/example.c":28:25 84 {*movdi_internal} (nil)) (insn 35 32 12 2 (set (reg:DI 127 [+8 ]) (subreg:DI (reg:V1TI 111 [ _4 ]) 8)) "/app/example.c":28:25 84 {*movdi_internal} (expr_list:REG_DEAD (reg:V1TI 111 [ _4 ]) (subreg:DI (reg:V1TI 111 [ _4 ]) 8) makes reload spills. foo1: movabsq $217020518514230019, %rdx # 57 [c=1 l=10] *movdi_internal/4 subq $24, %rsp # 59 [c=4 l=4] pro_epilogue_adjust_stack_add_di/0 vmovdqa (%rdi), %xmm0 # 8 [c=9 l=4] movv1ti_internal/3 movq %rdx, %rcx # 58 [c=4 l=3] *movdi_internal/3 vpsrldq $8, %xmm0, %xmm1 # 42 [c=4 l=5] sse2_lshrv1ti3/1 vpsrlq $1, %xmm0, %xmm0 # 45 [c=4 l=5] lshrv2di3/1 vpsllq $63, %xmm1, %xmm1 # 46 [c=4 l=5] ashlv2di3/1 vpor %xmm1, %xmm0, %xmm0 # 47 [c=4 l=4] *iorv2di3/1 vpand (%rsi), %xmm0, %xmm2 # 10 [c=13 l=4] andv1ti3/1 vmovdqa %xmm2, (%rsp) # 52 [c=4 l=5] movv1ti_internal/4 movq (%rsp), %rdi # 56 [c=5 l=4] *movdi_internal/3 movq 8(%rsp), %rsi # 35 [c=9 l=5] *movdi_internal/3 call __udivti3 # 19 [c=13 l=5] *call_value vmovq %rax, %xmm3 # 53 [c=4 l=5] *movdi_internal/20 vpinsrq $1, %rdx, %xmm3, %xmm0 # 23 [c=4 l=6] vec_concatv2di/2 vmovdqa %xmm0, c(%rip) # 25 [c=4 l=8] movv1ti_internal/4 addq $24, %rsp # 62 [c=4 l=4] pro_epilogue_adjust_stack_add_di/0 ret # 63 [c=0 l=1] simple_return_internal