https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114591
--- Comment #15 from Hongtao Liu <liuhongt at gcc dot gnu.org> --- > I don't see this as problematic. IIRC, there was a discussion in the past > that a couple (two?) memory accesses from the same location close to each > other can be faster (so, -O2, not -Os) than preloading the value to the > register first. At lease for memory with vector mode, it's better to preload the value to register first. > > In contrast, the example from the Comment #11 already has the correct value > in %eax, so there is no need to reload it again from memory, even in a > narrower mode. So the problem is why cse can't handle same memory with narrower mode, maybe it's because there's zero_extend in the first load. cse looks like can handle simple wider mode memory. 4952 /* See if a MEM has already been loaded with a widening operation; 4953 if it has, we can use a subreg of that. Many CISC machines 4954 also have such operations, but this is only likely to be 4955 beneficial on these machines. */
