[Bug target/114734] [11/12/13/14 regression] RISC-V rv64gcv_zvl256b miscompile with -flto -O3 -mrvv-vector-bits=zvl since r8-6047-g65dd1346027bb5

[cvs-commit at gcc dot gnu.org via Gcc-bugs]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114734

--- Comment #15 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Patrick O'Neill <pone...@gcc.gnu.org>:

https://gcc.gnu.org/g:ff4dc8b10a421cdb0c56f7f8c238609de4f9fbe2

commit r15-116-gff4dc8b10a421cdb0c56f7f8c238609de4f9fbe2
Author: Patrick O'Neill <patr...@rivosinc.com>
Date:   Tue Apr 30 13:26:45 2024 -0700

    RISC-V: Add testcase for pr114734

    gcc/testsuite/ChangeLog:

            PR middle-end/114734

            * gcc.target/riscv/rvv/autovec/pr114734.c: New test.

    Signed-off-by: Patrick O'Neill <patr...@rivosinc.com>