https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114942
--- Comment #2 from Uroš Bizjak <ubizjak at gmail dot com> --- This is the insn in question: ;; Alternative 1 is needed to work around LRA limitation, see PR82524. (define_insn_and_split "*<code>qi_ext<mode>_1_slp" [(set (strict_low_part (match_operand:QI 0 "register_operand" "+Q,&Q")) (any_logic:QI (subreg:QI (match_operator:SWI248 3 "extract_operator" [(match_operand 2 "int248_register_operand" "Q,Q") (const_int 8) (const_int 8)]) 0) (match_operand:QI 1 "nonimmediate_operand" "0,!qm"))) (clobber (reg:CC FLAGS_REG))] When targeting alternative 1, reload should use some other register for operand 2.