https://gcc.gnu.org/bugzilla/show_bug.cgi?id=117770
--- Comment #4 from Vladimir Makarov <vmakarov at gcc dot gnu.org> --- (In reply to John David Anglin from comment #3) > I suspect explicitly setting hard registers prior to reload confuses > LRA: > > ;;; Division and mod. > (define_expand "divsi3" > [(set (reg:SI 26) (match_operand:SI 1 "move_src_operand" "")) > (set (reg:SI 25) (match_operand:SI 2 "move_src_operand" "")) > (parallel [(set (reg:SI 29) (div:SI (reg:SI 26) (reg:SI 25))) > (clobber (match_dup 3)) > (clobber (match_dup 4)) > (clobber (reg:SI 26)) > (clobber (reg:SI 25)) > (clobber (match_dup 5))]) > (set (match_operand:SI 0 "move_dest_operand" "") (reg:SI 29))] Thank you for your report and detail analysis. I'll work on it as it might be a general problem affecting some other targets.