https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120652

--- Comment #2 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <pa...@gcc.gnu.org>:

https://gcc.gnu.org/g:52582b40a9bf839ae3771de1557ce6691eb8eedd

commit r16-1597-g52582b40a9bf839ae3771de1557ce6691eb8eedd
Author: Pan Li <pan2...@intel.com>
Date:   Thu Jun 19 18:58:17 2025 +0800

    RISC-V: Fix ICE for expand_select_vldi [PR120652]

    The will be one ICE when expand pass, the bt similar as below.

    during RTL pass: expand
    red.c: In function 'main':
    red.c:20:5: internal compiler error: in require, at machmode.h:323
       20 | int main() {
          |     ^~~~
    0x2e0b1d6 internal_error(char const*, ...)
            ../../../gcc/gcc/diagnostic-global-context.cc:517
    0xd0d3ed fancy_abort(char const*, int, char const*)
            ../../../gcc/gcc/diagnostic.cc:1803
    0xc3da74 opt_mode<machine_mode>::require() const
            ../../../gcc/gcc/machmode.h:323
    0xc3de2f opt_mode<machine_mode>::require() const
            ../../../gcc/gcc/poly-int.h:1383
    0xc3de2f riscv_vector::expand_select_vl(rtx_def**)
            ../../../gcc/gcc/config/riscv/riscv-v.cc:4218
    0x21c7d22 gen_select_vldi(rtx_def*, rtx_def*, rtx_def*)
            ../../../gcc/gcc/config/riscv/autovec.md:1344
    0x134db6c maybe_expand_insn(insn_code, unsigned int, expand_operand*)
            ../../../gcc/gcc/optabs.cc:8257
    0x134db6c expand_insn(insn_code, unsigned int, expand_operand*)
            ../../../gcc/gcc/optabs.cc:8288
    0x11b21d3 expand_fn_using_insn
            ../../../gcc/gcc/internal-fn.cc:318
    0xef32cf expand_call_stmt
            ../../../gcc/gcc/cfgexpand.cc:3097
    0xef32cf expand_gimple_stmt_1
            ../../../gcc/gcc/cfgexpand.cc:4264
    0xef32cf expand_gimple_stmt
            ../../../gcc/gcc/cfgexpand.cc:4411
    0xef95b6 expand_gimple_basic_block
            ../../../gcc/gcc/cfgexpand.cc:6472
    0xefb66f execute
            ../../../gcc/gcc/cfgexpand.cc:7223

    The select_vl op_1 and op_2 may be the same const_int like (const_int 32).
    And then maybe_legitimize_operands will:

    1. First mov the const op_1 to a reg.
    2. Resue the reg of op_1 for op_2 as the op_1 and op_2 is equal.

    That will break the assumption that the op_2 of select_vl is immediate,
    or something like CONST_INT_POLY.

    The below test suites are passed for this patch series.
    * The rv64gcv fully regression test.

            PR target/120652

    gcc/ChangeLog:

            * config/riscv/autovec.md: Add immediate_operand for
            select_vl operand 2.

    gcc/testsuite/ChangeLog:

            * gcc.target/riscv/rvv/autovec/pr120652-1.c: New test.
            * gcc.target/riscv/rvv/autovec/pr120652-2.c: New test.
            * gcc.target/riscv/rvv/autovec/pr120652-3.c: New test.
            * gcc.target/riscv/rvv/autovec/pr120652.h: New test.

    Signed-off-by: Pan Li <pan2...@intel.com>

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