https://gcc.gnu.org/bugzilla/show_bug.cgi?id=121602

--- Comment #2 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jennifer Schmitz <jschm...@gcc.gnu.org>:

https://gcc.gnu.org/g:5690b710a1c2d36436361d6089187c5b3e4261e8

commit r16-3905-g5690b710a1c2d36436361d6089187c5b3e4261e8
Author: Jennifer Schmitz <jschm...@nvidia.com>
Date:   Thu Aug 28 03:10:27 2025 -0700

    aarch64: Force vector in SVE gimple_folder::fold_active_lanes_to.

    An ICE was reported in the following test case:
    svint8_t foo(svbool_t pg, int8_t op2) {
          return svmul_n_s8_z(pg, svdup_s8(1), op2);
    }
    with a type mismatch in 'vec_cond_expr':
    _4 = VEC_COND_EXPR <v16_2(D), v32_3(D), { 0, ... }>;

    The reason is that svmul_impl::fold folds calls where one of the operands
    is all ones to the other operand using
    gimple_folder::fold_active_lanes_to. However, we implicitly assumed
    that the argument that is passed to fold_active_lanes_to is a vector
    type. In the given test case op2 is a scalar type, resulting in the type
    mismatch in the vec_cond_expr.

    This patch fixes the ICE by forcing a vector type of the argument
    in fold_active_lanes_to before the statement with the vec_cond_expr.

    In the initial version of this patch, the force_vector statement was placed
in
    svmul_impl::fold, but it was moved to fold_active_lanes_to to align it with
    fold_const_binary which takes care of the fixup from scalar to vector
    type using vector_const_binop.

    The patch was bootstrapped and tested on aarch64-linux-gnu, no regression.
    OK for trunk?
    OK to backport to GCC 15?

    Signed-off-by: Jennifer Schmitz <jschm...@nvidia.com>

    gcc/
            PR target/121602
            * config/aarch64/aarch64-sve-builtins.cc
            (gimple_folder::fold_active_lanes_to): Add force_vector
            statement.

    gcc/testsuite/
            PR target/121602
            * gcc.target/aarch64/sve/acle/asm/mul_s16.c: New test.
            * gcc.target/aarch64/sve/acle/asm/mul_s32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mul_s64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mul_s8.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mul_u16.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mul_u32.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mul_u64.c: Likewise.
            * gcc.target/aarch64/sve/acle/asm/mul_u8.c: Likewise.
  • [Bug target/121602] [15/16 Regr... cvs-commit at gcc dot gnu.org via Gcc-bugs

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