https://gcc.gnu.org/bugzilla/show_bug.cgi?id=58727
--- Comment #8 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Jeff Law <l...@gcc.gnu.org>: https://gcc.gnu.org/g:cda451531c6d58e3f02e203d008d9ea13397bf26 commit r16-3931-gcda451531c6d58e3f02e203d008d9ea13397bf26 Author: Shreya Munnangi <smunnan...@ventanamicro.com> Date: Wed Sep 17 07:27:34 2025 -0600 [PR tree-optimization/58727] Don't over-simplify constants` Here's Shreya's next patch. In pr58727 we have a case where the tree/gimple optimizers have decided to "simplify" constants involved in logical ops by turning off as many bits as they can in the hope that the simplified constant will be easier/smaller to encode. That "simplified" constant gets passed down into the RTL optimizers where it can ultimately cause a missed optimization. Concretely let's assume we have insns 6, 7, 8 as shown in the combine dump below: > Trying 6, 7 -> 9: > 6: r139:SI=r141:SI&0xfffffffffffffffd > REG_DEAD r141:SI > 7: r140:SI=r139:SI&0xffffffffffbfffff > REG_DEAD r139:SI > 9: r137:SI=r140:SI|0x2 > REG_DEAD r140:SI We can obviously see that insn 6 is redundant as the bit we turn off would be turned on by insn 9. But combine ultimately tries to generate: > (set (reg:SI 137 [ _3 ]) > (ior:SI (and:SI (reg:SI 141 [ a ]) > (const_int -4194305 [0xffffffffffbffffd])) > (const_int 2 [0x2]))) That does actually match a pattern on RISC-V, but it's a pattern that generates two bit-clear insns (or a bit-clear followed by andi and a pattern we'll be removing someday). But if instead we IOR 0x2 back into the simplified constant we get: > (set (reg:SI 137 [ _3 ]) > (ior:SI (and:SI (reg:SI 141 [ a ]) > (const_int -4194305 [0xffffffffffbfffff])) > (const_int 2 [0x2]))) That doesn't match, but when split by generic code in the combiner we get: > Successfully matched this instruction: > (set (reg:SI 140) > (and:SI (reg:SI 141 [ a ]) > (const_int -4194305 [0xffffffffffbfffff]))) > Successfully matched this instruction: > (set (reg:SI 137 [ _3 ]) > (ior:SI (reg:SI 140) > (const_int 2 [0x2]))) Which is bclr+bset/ori. ie, we dropped one of the logical AND operations. Bootstrapped and regression tested on x86 and riscv. Regression tested on the 30 or so embedded targets as well without new failures. I'll give this a couple days for folks to chime in before pushing on Shreya's behalf. This doesn't fix pr58727 for the other targets as they would need target dependent hackery. Jeff PR tree-optimization/58727 gcc/ * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): In (A & C1) | C2, if (C1|C2) results in a constant with a single bit clear, then adjust C1 appropriately. gcc/testsuite/ * gcc.target/riscv/pr58727.c: New test.
